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DKVL1-EP
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DIGITALCAPACITOR BANK PROTECTION AND FAULT LOCATOR
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| The digital capacitor bank protection and fault
locator of type DKVL1-EP is part of device family named EuroProt. This short
description contains special data of this type. General and common features
of EuroProt family can be found in the EuroProt system information sheet.
Accordingly it is proposed to study both this short description and system
information sheet too, in order to understand the device entirely. |
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| Application field |
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| The DKVL1-EP digital capacitor bank protection
is designed to protect star connected capacitor banks divided in two half.
It is connected to the line-to-Iine voltage of the discharge voltage transformer,
and to the voltage transformer between the two star points. The application
of the same type of voltage transformers is advisable. The design supposes
isolated type on both ends, with the given turns ratio of rated line voltage/100
V, if it is not ordered otherwise. In this application in case of rated
network voltage the secondary line-to-Iine voltage is 100 V. In case of
short-circuit of one half bank the voltage difference is 100/Ö3
V. As the device gets the line-to-line voltage of the discharge voltage
transfonner, its primary star point may be grounded as well. The displayed
voltages of the protection are given as percentage of this secondary rated
voltage, which is 100 V in case of line-to-line voltage, and in case of
full single phase short-circuit of one half bank the voltage difference
is the phase voltage. |
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| Main features |
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Protective function:
- definite time signalling stage with own time delay setting
- voltage dependent characteristics of the tripping stage with own time
delay
- fault locator, identifying the faulty half bank and the concerned
phase
- breaker failure protection
- interactive compensation of the operating voltage asymmetry
Software characteristics:
- built-in self check functions
- digital event recorder for 50 events, event sequence recording with
1 ms time resolution for max. 300 events
- analog event recorder for short-circuit voltage data
- intelligent digital function matrix
Hardware characteristics:
- fully numerical type, with individual AID converters, digital signal
processors (DSP) and separate main processor
- 8 opto-coupler inputs
- 12 output contacts
- type of output contacts (NC, NO) can be selected when ordering
- design for 19" rack cabinets or housed in relay boxes (semi-flush
or hinged type)
Communication:
- relay setting with 2x16 character LCD display, suitable also for text
messages and for event log display
- on-line screen of auxiliary PC for support of commissioning
- auxiliary communication connection selectable for RS 232 or fibre
optic cable
- optional SCADA connection with IEC 870 protocol
- parameters can be saved and saved parameters can be downloaded again
- real-time clock with battery-fed RAM, (which can be synchronised via
fibre-optic connection by auxiliary PC, by the SCADA system, or via
opto-coupler digital input)
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| Working principle |
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The DKVL1-EP device is a fully microprocessor based construction, the
functions and their versions are realised basically on software.
The device contains more 87C196 type 16 bit micro-controller and a DSP
performing digital signal processing. The program is stored in EPROM,
the message text for the display is stored in EPROM as well. The parameter
setting is loaded in EEPROM. Events are recorded in battery supplied RAM.
The man-machine interface consists ofa keyboard with six push-buttons,
above it the two row, 2x16 character LCD display, seven LEDs and two SW
pushbuttons. With auxiliary PC and with the handling program a device
can easier be operated.
The analog voltage inputs are connected via inductive internal measuring
transformers and low-pass filters to the multiplexer then to the A/D converter,
where all voltage signals are sampled in every 0,5 ms. The sampled values
of the 16 bit A/D converter are passed via high speed CAN bus to the digital
signal processors (DSP), which perform arithmetic operation with high
speed. The outputs of the DSP are the processed and evaluated measurements,
as "started" signals of the relay functions, which are sent
to the CPU. The timers and logic functions are performed here. The central
processor communicates via parallel bus with the opto-coupler inputs and
with the relay drivers.
THE PROTECTION
In case of internal fault inside the capacitor bank the voltage difference
measured between the star points changes. The protection involves a signalling
stage and a tripping stage. The tripping stage starts a second timer as
well, which -in case of breaker failure -disconnects the circuit breaker
feeding the bus-bar.
The setting of the signalling stage is suitable, if the fault ofone capacitor
unit can be detected. In case of smaller units there is possibility to
select a setting, which detects the break of connection of one unit as
well.
In case of larger capacitor banks the user has a great interest to operate
the bank as long as possible in energised state. The healthy units however
must be protected against voltages higher than the normal value, so the
precondition of tripping is if the voltage of the highest stressed healthy
unit is above the allowed limit. This depends on the actual voltage, on
the type and extension of the fault. In case of low network voltage a
higher percentage of faulty elements is allowed without the endangering
the other healthy units. The tripping stage must have a voltage dependent
tripping characteristics.
According to these facts the healthy capacitor units are overloaded, if
without faulty elements the voltage itself is above the allowed limit.
In this case tripping would be needed. A practical requirements is however,
that the capacitor bank protection should operate only, if there is fault
inside the bank. So the characteristic of the protection is limited: if
the asymmetry is less than a set value, no trip command is issued. It
is obvious, if a fix relay operating value is required then the allowed
voltage setting should be less than the normal network voltage. With this
setting the protection operates in the fix section of the characteristics.
FAULT LOCATOR
The fault locator helps finding the faulty element after tripping by the
protection, identifying the faulty half bank and the faulty phase. The locator
determines the phase angle of the voltage difference, and based on this
value the fault location can be identified. As for example the short-circuit
in phase R results the same fault voltage, then open conductor in R phase
of the other half bank, it is not possible to make difference between these
two states. The protection should be connected according to the most probable
fault type. In case of internal fuses the open state is more probable, because
a short-circuit will result open conductor if the internal fuse melts.
The locator operates in case of warning signal and in case of trip command
as well. The fault location is calculated 80 ms after the operation of the
protection, the displaying and the event logging is performed however at
the same time, as closing the warning or tripping contact. In this way the
displaying by the locator in case of transient faults does not disturb the
operator ifno other event happens. The locator calculates the vector location
of the. voltage difference comparing to he ST line voltage and to a vector,
which is between R phase and the middle point of ST line voltage, perpendicular
to ST voltage, scaled to line voltage size. The angle measurement is performed
only if the voltage is above 50% Un, to avoid errors in fault location caused
by missing or too low voltage in case of signaIling or tripping.
Using the on-line display of a computer, beside the bits identifying the
warning and tripped states of the individual stages the result of fault
location is displayed as well. This is valid, until the measuring element
is in active state. In the event menu of the display on the device it can
be displayed only if the event is over, and the function is dropped off.
THE PROCEDURE OF COMPENSATION
Because of the capacitance deviations of individual capacitors in the assembled
banks, there is always a certain asymmetry present. As in certain cases
it can be above the minimum set level of the warning stage, and the correct
operation of the fault locator would be impossible as well, this natural
asymmetry must be compensated. This can be carried out with the parameter
setting menu. In this case the protection measures the natural voltage difference,
and it can be compensated to zero value by adding two perpendicular vectors
of appropriate value. All subsequent changes will be measured referencing
this compensated vector value. The 50% voltage limit is valid here as well,
below this value no compensation is possible. If the user tries to do it,
the program gets to the unsuccessfully compensated state, and the compensation
of the previous successful attempt remains. The compensated state can be
switched off, in this case using the "Test" menu the display shows
the measured voltage difference. |
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| Technical data |
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| Rated secondary voltage (line), Un |
100 V or 200 V |
| Rated frequency |
50 Hz or 60 Hz
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Overload capacity, thermal
voltage circuit, continuous |
2xUn/Ö3 |
| Accuracy, timers |
± 3 ms (steps 10 ms)
± 12 ms (steps 1 s) |
| Reset ratio, current relays |
95% |
| Number of output relays |
12 pcs |
| Type of contacts (NO / NC) |
2 NC, 10 NO (or as requested) |
Output contacts ratings:
rated switching voltage
continuous load current
switching on current
breaking current at 220 V dc,
pure conductive circuit
L/R = 40 ms load
option at load of L/R = 40 ms |
250 V
8 A
16 A
0,25 A
0,14 A
4 A |
Auxiliary DC voltage (the same supply unit)
voltage tolerance |
220 V or 110 V
88 V to 310 V |
| Permissive ambient temperature |
0o to 50o C |
| Insulation test (IEC 255) |
2 kV, 50 Hz
5 kV, 1.2/50 µs |
| Disturbance test (IEC 255) |
2.5 kV, 1 MHz |
| Electrostatic discharge (ESD; IEC 801-2) |
8 kV |
| Burst test, (IEC 801-4) |
2 kV |
| Setting ranges |
| Setting of the warning stage |
4-100‰, step 2‰ |
| Setting value of the constant section of the tripping
stage |
4-100‰, step 2‰ |
| Slope code of the tripping characteristics |
0-10, step 1 (in case of 0 slope is 0.7) |
| Allowed voltage limit of the capacitor bank, related
to the secondary rated voltage |
90-130%, step 2% |
| Time delay of warning stage |
0,2-10 s, step 0,1 s |
| Time delay of tripping stage |
0,2-10 s, step 0,1 s |
| Time delay of backup stage |
0,2-10 s, step 0,1 s |
| External communication type |
RS 232/fibre optical cable |
| Optical cable operation mode |
Radial or loop |
| External communication speed (BaudRate) |
150 do 19200, step 2x |
| Daily automatic self-check time |
0 do 23 h 59 min, step 1 min |
| Automatic self-check block |
do 60 min |
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| Design, size |
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An EuroProt device is always rack mounted,
it has two design forms. One of the form is suitable to be mounted into
standard 19" cabinet frame, this form is also suitable to be mounted
directly to a relay panel with flash mounted form. The other form is a relay
panel mounted device with raised-hinged form.
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Design
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Width
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Height
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Depth
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Rack mounting
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483 mm
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132,5 mm
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201 mm
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Panel mounting
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490 mm
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250 mm
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250 mm
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Weight: 6 kg. |
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| Options |
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- digital disturbance recorder (see separate information sheet)
- SCADA connection (see EuroProt system information sheet)
- output relays with 4 A breaking capability
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| Data to be ordered |
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- Protection type [DKVL1-EP]
- Rated voltage [100 V, 200 V]
- Output relay contact type [NC or NO]
- Protection case type
- Options if needed
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